This invention relates generally to computer based automotive diagnostic test equipment and specifically to a technique for rapidly scaling digital data to a fixed pixel display memory to simulate an analog "scope" function.
The prior art discloses automobile engine diagnostic testing devices that are computer based. One diagnostic tester, identified as the Sun Electric Corporation Model 2001, is described and claimed in U.S. Pat. No. 4,125,894 issued Nov. 14, 1978, which is incorporated by reference herein. With that tester, selected analog signals are gathered from an engine under test by means of one or more suitable probes connected to the engine. The received analog signals are conditioned, manipulated, processed and compared with factory specifications for the engine. The data is also displayed on a raster scan cathode type ray tube (CRT) display and a printout of test results is also provided. A recently introduced computerized diagnostic tester that is IBM PC compatible is the Sun Electric Corporation Model MCA 3000. The MCA 3000 is capable of receiving and processing engine test signals at significantly higher speeds than prior art testers, primarily due to its data acquistion system (DAS). With the DAS, analog data and test signals obtained from an engine under test are converted by an analog to digital (A/D) converter, flagged and stored in a random access memory (RAM) without the intervention of the main system microprocessor or its address/data bus.
In co-pending application Ser. No. 148,973, now U.S. Pat. No. 4,907,176, a system for generating identification flags for signals, acquired from an engine under test and converted by an A/D converter, to permit their storage in a RAM memory in a retrievable manner is disclosed and claimed. The flags identify the beginning of an event such as a cylinder firing, a cylinder No. 1 firing, a solenoid dwell cycle and the like. The flag bits selected are more significant than any of the magnitude bits used in the digital words. For example, in a sixteen bit digital word having bits (D0-D15), eleven bits (D0-D10) are used for magnitude, one bit (D15) is for the sign of the quantity, i.e. positive or negative magnitude, and four bits (D11-D14) are utilized for flags. In the flag system, bit D15 is made equal to the sign bit D11. This is referred to as sign extended 2's complement notation. The flags enable identification of the digital words in the A/D RAM memory and facilitate efficient utilization of that data.
In co-pending application Ser. No. 148,972, now U.S. Pat. No. 4,903,219, a parity checking routine that is resident in the system microprocessor is run to identify flags in the digital words in the A/D memory. Bit masking techniques are used to find and to reset the flags when returning the data to memory. Information about the location of different types of flags is stored in pointer arrays established in the system memory by the system microprocessor controller.
In co-pending application Ser. No. 148,974, now U.S. Pat. No. 4,903,220, an external dual ported 128 kilobyte RAM memory is plugged into a ROM cartridge slot in an IBM compatible PC system. The RAM memory can be written to by the DAS system as well as accessed by the system microprocessor controller. Dual porting is obtained by using a conventional single ported RAM in conjunction with a pair of buffers to control access to the RAM from the DAS system and from the system microprocessor. The added RAM memory enables the DAS system to operate substantially independently of the system microprocessor in acquiring, converting to digital format, and flagging of engine test signals. Thus the system's microprocessor need not be burdened with the task of engine test data acquisition and overall system speed is significantly increased.
Co-pending application Ser. No. 198,305, now abandoned, discloses a method of using an EGA (Enhanced Graphics Adapter) board in its bit plane mode for performing high speed oscilloscope functions. With the technique, a single bit in any of the four bit planes may be set or cleared without disturbing the data in other planes. With it, the MCA 3000 software can generate a rapidly updated trace against a graticule and with highlight and label data, with the trace updating approaching real time.
Co-pending application Ser. No. 198,225, now abandoned, discloses a method of operating a color bit plane memory to create the illusion of four independent overlying color planes. A hierarchy is established among the planes and color plane bit groups are mapped to color display groups based upon the hierarchy. The method precludes color changes wherever the patterns in the different planes intersect or overlap.
The present invention is concerned with the method of taking flagged data from DAS memory and loading it into a display memory of fixed size. The A/D converter of the MCA 3000 operates at a fixed frequency and collects 62,500 data samples per second, which is one sample every 16 microseconds. The data has a resolution of 12 bits but, as mentioned, 16 bit digital words are used. Since the test engines operate at varying speeds, the number of samples collected by the A/D converter varies over a substantial range. In order to produce an analog type scope display with digital display memories and techniques, a method of scaling the received data to the display memory size is needed. There are techniques in the prior art for accomplishing this, which either adjust the A/D sampling rate in accordance with engine speed to gather a fixed number of samples to fit the display memory, or which use complex hardware for scaling the data. It will be appreciated that scaling the magnitude of the data presents a much lesser problem than scaling the number of received data sample points. While the present invention is software based, it does not suffer the disadvantage of most software systems in that it is extremely fast operating. In essence, the method of the invention determines the number of samples in the data and calculates an "increment" that relates the number of samples in the data to the number of points or pixels in the memory. A processing technique, which is denominated "fixed point processing", is used to rapidly scale the data samples by very fast and simple instructions.